A memory can include a memory cell array with non-volatile memory cells for storing information such as serial numbers or trimming adjustments of analog circuits in a semiconductor body.
Document U.S. Pat. No. 6,876,594 shows an integrated circuitry with a cell array comprising programmable fuses.
Document U.S. Pat. No. 6,462,985 describes a non-volatile semiconductor memory with electrically re-writable non-volatile memory cells. Defective memory cells are replaced by redundant circuitry parts.
Document U.S. Pat. No. 5,384,746 deals with a circuitry for storing and retrieving information. A cell comprises a fuse and a test fuse.
Document US 2005/0212086 describes a Zener diode for storing information.
The Document “Lifetime Study for a Poly Fuse in a 0.35 μm Polycide CMOS Process”, J. Fellner, P. Bösmüller, H. Reiter, conference transcript IEEE International Reliability Physics Symposium, Apr. 17-21, 2005, pages 446-449, describes a fuse comprising polysilicon and silicide layers.